A UVM testbench built under tapeout pressure — rescuing a design stuck at 40% functional coverage and closing it beyond 98% before sign-off.
The client's IP team had an existing directed testbench for their AXI4-Lite peripheral controller. After months of development, functional coverage had stalled at 40% — well below the 95% threshold required for tapeout sign-off. With the tapeout window just weeks away, the risk of silicon escapes was unacceptable.
Directed tests had exhausted the obvious scenarios, but the long tail of protocol corner cases — back-to-back transactions, simultaneous read/write interleaving, error response handling, and address-channel stalls — remained unverified. The team needed a systematic, coverage-driven approach delivered fast.
We assessed the existing testbench and existing coverage holes within the first day, then built a complete UVM verification environment targeting AXI4-Lite protocol compliance from scratch — without discarding the client's existing directed tests, which were integrated as UVM sequences.
Coverage model first. Defined a detailed functional coverage model mapping every AXI4-Lite protocol feature — channel handshakes, burst types, response codes, and outstanding transaction counts — to measurable coverage bins before writing a single test.
UVM agent and scoreboard. Built a protocol-aware UVM agent with a driver, monitor, and scoreboard. The scoreboard independently modelled expected AXI responses and flagged any mismatch against DUT output — catching functional bugs, not just coverage holes.
Constrained-random sequences. Developed constrained-random virtual sequences targeting uncovered bins: back-to-back transactions with no gaps, interleaved read/write, address-channel stalls, DECERR/SLVERR responses, and maximum outstanding transaction limits.
Coverage-closure regression. Ran nightly regressions with coverage-guided seed selection. Gaps were reviewed each morning and targeted with additional constraints or directed corner-case sequences the same day.
SVA property checks. Added SystemVerilog assertions for protocol invariants — valid/ready handshake ordering, response channel synchronisation, and no-burst-size violations — giving a second independent check layer alongside the scoreboard.
Functional and toggle coverage exceeded 98% across all corner modes and operating conditions prior to sign-off. Three previously undetected functional bugs were found during the constrained-random campaign — all fixed before the tapeout window closed.
The UVM environment, sequences, and coverage model were handed back to the client as reusable assets for future IP iterations. The engagement completed within the tapeout schedule with no schedule impact.
Coverage stalled? Tapeout approaching? We build UVM environments that close coverage and catch functional bugs — fast. Describe your situation and we'll respond within 24 hours.
